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authorYazen Ghannam <[email protected]>2019-02-28 15:36:10 +0000
committerBorislav Petkov <[email protected]>2019-03-27 00:13:25 +0100
commitbdcee7747f5c490297665af0e1e0fbeb4368804d (patch)
treefd79cb8c3a582226be66d7b1cbf74e3afef6b326 /tools/perf/scripts/python/export-to-sqlite.py
parent4d30d2bc3c23e63c2608bc5b03b0960490d5b740 (diff)
EDAC/amd64: Support more than two Unified Memory Controllers
The first few models of Family 17h all had 2 Unified Memory Controllers per Die, so this was treated as a fixed value. However, future systems may have more Unified Memory Controllers per Die. Related to this, the channel number and base address of a Unified Memory Controller were found by matching on fixed, known values. However, current and future systems follow this pattern for the channel number and base address of a Unified Memory Controller: 0xYXXXXX, where Y is the channel number. So matching on hardcoded values is not necessary. Set the number of Unified Memory Controllers at driver init time based on the family/model. Also, update the functions that find the channel number and base address of a Unified Memory Controller to support more than two. [ bp: Move num_umcs into the .c file and simplify comment. ] Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Tested-by: Kim Phillips <[email protected]> Cc: James Morse <[email protected]> Cc: Mauro Carvalho Chehab <[email protected]> Cc: linux-edac <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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