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authorFlorian Fainelli <[email protected]>2021-10-27 12:37:29 -0700
committerFlorian Fainelli <[email protected]>2021-11-15 19:09:40 -0800
commit754c4050a00e802e122690112fc2c3a6abafa7e2 (patch)
tree8e37bf9aa0a3871e602b833d08107de70e9ff173 /tools/perf/scripts/python/export-to-sqlite.py
parentfa55b7dcdc43c1aa1ba12bca9d2dd4318c2a0dbf (diff)
ARM: dts: BCM5301X: Fix I2C controller interrupt
The I2C interrupt controller line is off by 32 because the datasheet describes interrupt inputs into the GIC which are for Shared Peripheral Interrupts and are starting at offset 32. The ARM GIC binding expects the SPI interrupts to be numbered from 0 relative to the SPI base. Fixes: bb097e3e0045 ("ARM: dts: BCM5301X: Add I2C support to the DT") Tested-by: Christian Lamparter <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
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