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authorMichael Strauss <[email protected]>2020-04-05 16:41:12 -0400
committerAlex Deucher <[email protected]>2020-04-07 14:22:10 -0400
commit72f5b5a308c744573fdbc6c78202c52196d2c162 (patch)
tree6ea0aedbc0219d9928d2424efc70f0463e7cf892 /tools/perf/scripts/python/export-to-sqlite.py
parent6dbebf4da3616a14f43041b81a0881a7343ce5fc (diff)
drm/amd/display: Check for null fclk voltage when parsing clock table
[WHY] In cases where a clock table is malformed such that fclk entries have frequencies but not voltages listed, we don't catch the error and set clocks to 0 instead of using hardcoded values as we should. [HOW] Add check for clock tables fclk entry's voltage as well Signed-off-by: Michael Strauss <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
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