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authorGeert Uytterhoeven <[email protected]>2019-03-01 12:07:15 +0100
committerGeert Uytterhoeven <[email protected]>2019-03-18 17:03:57 +0100
commit6a82559f745bc26d2e4974c1d26014ef7fa14794 (patch)
tree922dc1124ce2bfba27be5e2ef24c9fd10d0d3efb /tools/perf/scripts/python/export-to-sqlite.py
parent9e98c678c2d6ae3a17cb2de55d17f69dddaa231b (diff)
clk: renesas: rcar-gen3: Pass name/offset to cpg_sd_clk_register()
Explicitly pass the clock's name and register offset to cpg_sd_clk_register(), so the latter doesn't have to extract them from the cpg_core_clk object. This keeps all cpg_core_clk parsing and unmarshalling contained in a single function (rcar_gen3_cpg_clk_register()). Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Niklas Söderlund <[email protected]> Reviewed-by: Simon Horman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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