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authorReza Amini <[email protected]>2020-07-15 11:33:23 -0400
committerAlex Deucher <[email protected]>2020-08-06 16:40:18 -0400
commit471c1dd9546df81d259664ac3e2ab0e99169f755 (patch)
tree9c7dfcbbaeedbe03a8cd923733a09745e289d774 /tools/perf/scripts/python/export-to-sqlite.py
parent6b6352dd1f96ca2464d7373557cb913f00c9e6dd (diff)
drm/amd/display: Allow asic specific FSFT timing optimization
[Why] Each asic can optimize best based on its capabilities [How] Optimizing timing for a new pixel clock Signed-off-by: Reza Amini <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Eryk Brol <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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