diff options
| author | Marek Szyprowski <[email protected]> | 2017-11-29 12:26:38 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <[email protected]> | 2017-12-01 17:47:15 +0100 |
| commit | 3b94d24dea6c1253a3bcec390401ddbf568125cd (patch) | |
| tree | 2f3b185a6559eb979f76532d4c92b7c546304992 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 217d3f4f9ad5b4e51d8038560ce8906d19d1abe3 (diff) | |
arm64: dts: exynos: Add remaining power domains to Exynos5433 SoC
This patch adds support for G2D, G3D, CAM0, CAM1, ISP, HVEC power domains
to Exynos5433 SoCs. Currently only clock controllers for those domains are
defined. CAM1 is a parent of CAM0 power domain and CAM0 is a parent of ISP
power domain.
Signed-off-by: Marek Szyprowski <[email protected]>
Reviewed-by: Chanwoo Choi <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions