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authorLu Baolu <[email protected]>2021-08-18 21:48:48 +0800
committerJoerg Roedel <[email protected]>2021-08-19 10:41:08 +0200
commit289b3b005cb9d9dd6b30297b52c2b4596bc878b2 (patch)
treefbbfa6ceb84862eeeb8be20af160039658b14b24 /tools/perf/scripts/python/export-to-sqlite.py
parent792fb43ce2c98878f1539c1d3fdecc1d7a7d78fd (diff)
iommu/vt-d: Preset A/D bits for user space DMA usage
We preset the access and dirty bits for IOVA over first level usage only for the kernel DMA (i.e., when domain type is IOMMU_DOMAIN_DMA). We should also preset the FL A/D for user space DMA usage. The idea is that even the user space A/D bit memory write is unnecessary. We should avoid it to minimize the overhead. Suggested-by: Sanjay Kumar <[email protected]> Signed-off-by: Lu Baolu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
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