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| author | Pali Rohár <[email protected]> | 2021-11-24 16:59:43 +0100 |
|---|---|---|
| committer | Lorenzo Pieralisi <[email protected]> | 2021-12-06 14:12:57 +0000 |
| commit | 1f1050c5e1fefb34ac90a506b43e9da803b5f8f7 (patch) | |
| tree | 5b1c1a455a14b35e766e37b34acbc25ee045b728 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 12998087d9f48b66965b97412069c7826502cd7e (diff) | |
PCI: pci-bridge-emul: Correctly set PCIe capabilities
Older mvebu hardware provides PCIe Capability structure only in version 1.
New mvebu and aardvark hardware provides it in version 2. So do not force
version to 2 in pci_bridge_emul_init() and rather allow drivers to set
correct version. Drivers need to set version in pcie_conf.cap field without
overwriting PCI_CAP_LIST_ID register. Both drivers (mvebu and aardvark) do
not provide slot support yet, so do not set PCI_EXP_FLAGS_SLOT flag.
Link: https://lore.kernel.org/r/[email protected]
Fixes: 23a5fba4d941 ("PCI: Introduce PCI bridge emulated config space common logic")
Signed-off-by: Pali Rohár <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Cc: [email protected]
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions