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author | Marc Zyngier <[email protected]> | 2021-10-17 13:42:11 +0100 |
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committer | Daniel Lezcano <[email protected]> | 2021-10-17 21:46:59 +0200 |
commit | 1e8d929231cf7b397101c5e6aaaa3d9bc9832f10 (patch) | |
tree | 9f6b4f811b9dee858fefd5e4c58a5e2feec03789 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | d72689988d67d56aebf7afb7f609373ea6b548db (diff) |
clocksource/drivers/arm_arch_timer: Extend write side of timer register accessors to u64
The various accessors for the timer sysreg and MMIO registers are
currently hardwired to 32bit. However, we are about to introduce
the use of the CVAL registers, which require a 64bit access.
Upgrade the write side of the accessors to take a 64bit value
(the read side is left untouched as we don't plan to ever read
back any of these registers).
No functional change expected.
Reviewed-by: Oliver Upton <[email protected]>
Reviewed-by: Mark Rutland <[email protected]>
Tested-by: Mark Rutland <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daniel Lezcano <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions