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authorTrent Piepho <[email protected]>2019-02-05 00:17:41 +0000
committerLorenzo Pieralisi <[email protected]>2019-02-12 19:17:34 +0000
commit1df82ec4660099fdae42545051cbbeacb5666b50 (patch)
treecb9343c7a386a4d736fdd0d51f5c4280558a664e /tools/perf/scripts/python/export-to-sqlite.py
parent27f7717e2344a087e396796ed6b10d15722c9e43 (diff)
PCI: imx: Add workaround for e10728, IMX7d PCIe PLL failure
This implements the workound described in the NXP IMX7d erratum e10728. Initial VCO oscillation may fail under corner conditions such as cold temperature. It causes PCIe PLL to fail to lock in the initialization phase, which results in the PCIe link failing to come up. The workaround is to disable Duty-Cycle Corrector (DCC) calibration after G_RST. To do this it is necessary to gain access to the undocumented and currently unused PCIe PHY register bank. A new device tree node of type "fsl,imx7d-pcie-phy" is created for the PHY block and the existing PCIe device uses a phandle named "fsl,imx7d-pcie-phy" to point to it. Signed-off-by: Trent Piepho <[email protected]> [[email protected]: updated log string, commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Lucas Stach <[email protected]>
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