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author | Georgi Djakov <[email protected]> | 2017-12-05 17:47:00 +0200 |
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committer | Jassi Brar <[email protected]> | 2018-02-04 12:16:34 +0530 |
commit | 0ae7d327a64b262443b7d3ebee5831e4dde47b89 (patch) | |
tree | a13d0664a450e16e90bcbd45dc470b3944d968df /tools/perf/scripts/python/export-to-sqlite.py | |
parent | c815d769b598196bdbd104a7e049d07ae6fba0d2 (diff) |
dt-bindings: mailbox: qcom: Document the APCS clock binding
Update the binding documentation for APCS to mention that the APCS
hardware block also expose a clock controller functionality.
The APCS clock controller is a mux and half-integer divider. It has the
main CPU PLL as an input and provides the clock for the application CPU.
Signed-off-by: Georgi Djakov <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
Signed-off-by: Jassi Brar <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions