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| author | Krzysztof Kozlowski <[email protected]> | 2017-12-20 20:27:02 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <[email protected]> | 2018-01-03 18:15:19 +0100 |
| commit | 05e9e0c7f6e11f264ad5339add856eb5e61bec54 (patch) | |
| tree | fa0d350ec2b4210961cdd4cec03385ea490baa94 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | a0d00427636384ff584715d29a5f92c1b3b9e267 (diff) | |
arm64: dts: exynos: Fix typo in MSCL clock controller unit address of Exynos5433
Fix typo in unit address of MSCL clock controller (the reg entry is
correct) of Exynso5433.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Chanwoo Choi <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions