diff options
| author | Rob Herring <[email protected]> | 2015-05-29 11:38:46 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2015-06-09 12:20:30 -0700 |
| commit | fc6b68ba4990b4fb2625b150599c77d04d85b1eb (patch) | |
| tree | b8edbf17509af3fc7b79167926ca1e3f2ffaadd4 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | d95699be183c03bb804c1dfdbbeaba7ee1ed8a0d (diff) | |
usb: chipidea: add work-around for Marvell HSIC PHY startup
The Marvell 28nm HSIC PHY requires the port to be forced to HS mode after
the port power is applied. This is done using the test mode in the PORTSC
register.
As HSIC is always HS, this work-around should be safe to do with all HSIC
PHYs and has been tested on i.MX6S.
Signed-off-by: Rob Herring <[email protected]>
Tested-by: Peter Chen <[email protected]>
Cc: Greg Kroah-Hartman <[email protected]>
Cc: [email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions