diff options
author | Heiko Stuebner <[email protected]> | 2024-01-21 16:19:12 -0800 |
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committer | Palmer Dabbelt <[email protected]> | 2024-01-22 17:55:15 -0800 |
commit | df513ed49f0073ce1778eb469ab5db44bceade30 (patch) | |
tree | 8d88f21b7c57477092c363fdd721f38deae82695 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | 6613476e225e090cc9aad49be7fa504e290dd33d (diff) |
RISC-V: add helper function to read the vector VLEN
VLEN describes the length of each vector register and some instructions
need specific minimal VLENs to work correctly.
The vector code already includes a variable riscv_v_vsize that contains
the value of "32 vector registers with vlenb length" that gets filled
during boot. vlenb is the value contained in the CSR_VLENB register and
the value represents "VLEN / 8".
So add riscv_vector_vlen() to return the actual VLEN value for in-kernel
users when they need to check the available VLEN.
Signed-off-by: Heiko Stuebner <[email protected]>
Reviewed-by: Eric Biggers <[email protected]>
Signed-off-by: Jerry Shih <[email protected]>
Signed-off-by: Eric Biggers <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions