diff options
| author | Harry Wentland <[email protected]> | 2018-07-12 10:23:21 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2018-07-12 09:48:57 -0500 |
| commit | d89d01f2232b90e8024ae07ff5ab213521875448 (patch) | |
| tree | 48956dcc7153839eb82958af33aeca8ffa9230d4 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 9d4a0d4cdc8b5904ec7c9b9e04bab3e9e60d7a74 (diff) | |
drm/amd/display: Convert 10kHz clks from PPLib into kHz for Vega
The driver is expecting clock frequency in kHz, while SMU returns
the values in 10kHz, which causes the bandwidth validation to fail
4.18 has the faulty clock assignment in pp_to_dc_clock_levels_with_latency
only, which is only used by Vega. Make sure we multiply these values
by 10 here, as we do for other ASICs as powerplay assigned them
wrong. 4.19 has the proper fix in powerplay.
v2: Add Fixes tag
v3: Fixes -> Bugzilla, with simplified link
Bugzilla: https://bugs.freedesktop.org/107082
Signed-off-by: Mikita Lipski <[email protected]>
Signed-off-by: Harry Wentland <[email protected]>
Acked-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions