diff options
| author | Chen Zhong <[email protected]> | 2017-10-05 11:50:23 +0800 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2017-11-02 01:07:51 -0700 |
| commit | c955bf3998efa3355790a4d8c82874582f1bc727 (patch) | |
| tree | 4df4e73b5bd0d3d4ba1405bdb20950b7b5070308 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 808ecf4ad087f80c2eee99af67549f05d5315694 (diff) | |
clk: mediatek: add the option for determining PLL source clock
Since the previous setup always sets the PLL using crystal 26MHz, this
doesn't always happen in every MediaTek platform. So the patch added
flexibility for assigning extra member for determining the PLL source
clock.
Signed-off-by: Chen Zhong <[email protected]>
Signed-off-by: Sean Wang <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions