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authorXinliang Liu <[email protected]>2016-06-29 16:45:54 +0800
committerMichael Turquette <[email protected]>2016-07-06 15:20:31 -0700
commitc6e80ace83a90a410d09de0727ff9b151de6291a (patch)
treea7204cd3face64768e2752f235c9c5885adc996a /tools/perf/scripts/python/export-to-postgresql.py
parent1f501d632ed2f719d36c62ba1f8a68de0200391a (diff)
clk: hi6220: Change syspll and media_syspll clk to 1.19GHz
In the bootloader of HiKey/96boards, syspll and media_syspll clk was initialized to 1.19GHz. So, here changes it in kernel accordingly. 1.19GHz was chosen over 1.2GHz because at 1.19GHz we get more precise HDMI pixel clock (1.19G/16 = 74.4MHz) for 1280x720p@60Hz HDMI (74.25MHz required by standards). Closer pixel clock means better compatibility to HDMI monitors. Signed-off-by: Guodong Xu <[email protected]> Signed-off-by: Xinliang Liu <[email protected]> Signed-off-by: Michael Turquette <[email protected]> Link: lkml.kernel.org/r/[email protected]
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