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authorBorislav Petkov <[email protected]>2017-04-18 20:39:24 +0200
committerThomas Gleixner <[email protected]>2017-04-19 12:04:46 +0200
commitc6a9583fb41c8bd017f643d5bc90a0fe0a92fe43 (patch)
tree778468d19aabb514809cd930b6766c01002e8205 /tools/perf/scripts/python/export-to-postgresql.py
parent7237c75b2717d59ebf2c2595d416e16a160154e1 (diff)
x86/mce: Check MCi_STATUS[MISCV] for usable addr on Intel only
mce_usable_address() does a bunch of basic sanity checks to verify whether the address reported with the error is usable for further processing. However, we do check MCi_STATUS[MISCV] and that is not needed on AMD as that bit says that there's additional information about the logged error in the MCi_MISCj banks. But we don't need that to know whether the address is usable - we only need to know whether the physical address is valid - i.e., ADDRV. On Intel the MISCV bit is needed to perform additional checks to determine whether the reported address is a physical one, etc. Signed-off-by: Borislav Petkov <[email protected]> Cc: Yazen Ghannam <[email protected]> Cc: Tony Luck <[email protected]> Cc: linux-edac <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
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