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authorKobayashi,Daisuke <[email protected]>2024-10-02 10:15:49 +0900
committerDave Jiang <[email protected]>2024-10-28 10:07:33 -0700
commitc5eaec79fa43e994ec54c11538dc603d60cd0c4e (patch)
tree9a506732b6d54993165f180618d37acb3c35df63 /tools/perf/scripts/python/export-to-postgresql.py
parent7a01213d6c18d97c2f98455bb22c8416f8cca28b (diff)
cxl/pci: Add sysfs attribute for CXL 1.1 device link status
Add sysfs attribute for CXL 1.1 device link status to the cxl pci device. In CXL1.1, the link status of the device is included in the RCRB mapped to the memory mapped register area. Critically, that arrangement makes the link status and control registers invisible to existing PCI user tooling. Export those registers via sysfs with the expectation that PCI user tooling will alternatively look for these sysfs files when attempting to access to these CXL 1.1 endpoints registers. Reviewed-by: Jonathan Cameron <[email protected]> Signed-off-by: Kobayashi,Daisuke <[email protected]> Reviewed-by: Dan Williams <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Ira Weiny <[email protected]> Signed-off-by: Dave Jiang <[email protected]>
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