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authorPeter Hurley <[email protected]>2015-02-02 15:47:07 -0500
committerGreg Kroah-Hartman <[email protected]>2015-02-07 18:44:55 +0800
commitc09babfab7ae8c7d79a5dce9d866fbb28b82dde4 (patch)
treebe18492341b211fc4a1d64aaf8fb5add99e78426 /tools/perf/scripts/python/export-to-postgresql.py
parent692132b5b1c5ce97076915d4aed0c61513e18b03 (diff)
serial: 8250: Fix UART_BUG_TXEN workaround
UARTs which do not trigger THRE interrupt if the fifo is already empty when the interrupt is enabled need tx primed manually. These UARTs are identified by the UART_BUG_TXEN flag to enable the required workaround. However, the current workaround is broken; if the fifo is already empty but the shifter is still transmitting, then serial8250_tx_chars() will not be called but no further THRE interrupt will occur, and tx will stall. The appropriate check is for fifo empty (THRE), not transmitter empty (TEMT). Signed-off-by: Dick Hollenbeck <[email protected]> [pjh: rewrote commit log] Signed-off-by: Peter Hurley <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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