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authorXu Yang <[email protected]>2023-11-20 17:33:14 +0800
committerWill Deacon <[email protected]>2023-12-05 14:12:07 +0000
commit9745295358f44cc5da4145b2a5ca3e2921d70841 (patch)
tree6e39e9b8302d6051190d7f32866e714105fa5c2a /tools/perf/scripts/python/export-to-postgresql.py
parentafd83967e7bb9b41ee71153b868dcf94e43c2d7a (diff)
docs/perf: Add explanation for DDR_CAP_AXI_ID_PORT_CHANNEL_FILTER quirk
Add explanation for DDR_CAP_AXI_ID_PORT_CHANNEL_FILTER quirk. Signed-off-by: Xu Yang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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