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authorSuravee Suthikulpanit <[email protected]>2018-06-27 10:31:22 -0500
committerJoerg Roedel <[email protected]>2018-07-06 14:43:47 +0200
commit90fcffd9cf5e7cc593169f529799f3e3c5437e75 (patch)
tree8cea3c13a5a83e5bf4667e05888ec7ac919f8556 /tools/perf/scripts/python/export-to-postgresql.py
parente881dbd5d4a6950c9e2e7623c79d9578949365c9 (diff)
iommu/amd: Add support for IOMMU XT mode
The AMD IOMMU XT mode enables interrupt remapping with 32-bit destination APIC ID, which is required for x2APIC. The feature is available when the XTSup bit is set in the IOMMU Extended Feature register and/or the IVHD Type 10h IOMMU Feature Reporting field. For more information, please see section "IOMMU x2APIC Support" of the AMD I/O Virtualization Technology (IOMMU) Specification. Cc: Joerg Roedel <[email protected]> Signed-off-by: Suravee Suthikulpanit <[email protected]> Signed-off-by: Joerg Roedel <[email protected]>
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