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authorThor Thayer <[email protected]>2016-03-21 11:01:43 -0500
committerBorislav Petkov <[email protected]>2016-03-29 10:30:07 +0200
commit8b39ab7290d571b91867b15c02a59edf0a5b00bb (patch)
treed6c994fd7a08555a89bfb641eb348b6513489025 /tools/perf/scripts/python/export-to-postgresql.py
parent811fce4f2a7aea0cd93815d0eaf42fbcc98bd930 (diff)
Documentation, dt, socfpga: Add Altera Arria10 L2 cache binding
Add the device tree bindings needed to support the Altera L2 cache on the Arria10 chip. Since all the peripherals share IRQs, the IRQ fields are now in the ecc_manager. Signed-off-by: Thor Thayer <[email protected]> Acked-by: Rob Herring <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: linux-edac <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Borislav Petkov <[email protected]>
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