diff options
| author | Jing Liu <[email protected]> | 2022-01-05 04:35:26 -0800 |
|---|---|---|
| committer | Paolo Bonzini <[email protected]> | 2022-01-14 13:44:39 -0500 |
| commit | 86aff7a4799286635efd94dab17b513544703cad (patch) | |
| tree | 7c0c9a79614c07b1badf304082ab03b1b3c05eb4 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 61f208134a871047f1d642ed3b813f4f71e30b0e (diff) | |
kvm: x86: Add XCR0 support for Intel AMX
Two XCR0 bits are defined for AMX to support XSAVE mechanism. Bit 17
is for tilecfg and bit 18 is for tiledata.
The value of XCR0[17:18] is always either 00b or 11b. Also, SDM
recommends that only 64-bit operating systems enable Intel AMX by
setting XCR0[18:17]. 32-bit host kernel never sets the tile bits in
vcpu->arch.guest_supported_xcr0.
Signed-off-by: Jing Liu <[email protected]>
Signed-off-by: Kevin Tian <[email protected]>
Signed-off-by: Yang Zhong <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions