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| author | Mrinmay Sarkar <[email protected]> | 2024-04-30 21:51:26 +0530 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2024-05-04 17:36:56 +0530 |
| commit | 82b7487b8eb93e82ace92866560de3d4952555db (patch) | |
| tree | 662284c315ebe90ab0cec36cef8e52e02ca5be06 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 2ff6365e2271282bea155541e5e3deb9d9ff1572 (diff) | |
phy: qcom-qmp-pcie: add x4 lane EP support for sa8775p
Add support for x4 lane end point mode PHY found on sa8755p platform.
Reusing existing serdes and pcs_misc table for EP and moved
BIAS_EN_CLKBUFLR_EN register from RC serdes table to common serdes
table as this register is part of both RC and EP.
Signed-off-by: Mrinmay Sarkar <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions