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authorThierry Reding <[email protected]>2015-03-27 11:07:27 +0100
committerJoerg Roedel <[email protected]>2015-03-31 16:35:35 +0200
commit804cb54cbb3ddac58218e830d64816617bdb6da8 (patch)
tree2dcd8489f27b51dcdf99fe43267262ae80aced1a /tools/perf/scripts/python/export-to-postgresql.py
parent836a8ac9fe60fb112e830464868791bf7470e7b6 (diff)
iommu/tegra: smmu: Compute PFN mask at runtime
The SMMU on Tegra30 and Tegra114 supports addressing up to 4 GiB of physical memory. On Tegra124 the addressable physical memory was extended to 16 GiB. The page frame number stored in PTEs therefore requires 20 or 22 bits, depending on SoC generation. In order to cope with this, compute the proper value at runtime. Reported-by: Joseph Lo <[email protected]> Cc: Hiroshi Doyu <[email protected]> Signed-off-by: Thierry Reding <[email protected]> Signed-off-by: Joerg Roedel <[email protected]>
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