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| author | Chris Wilson <[email protected]> | 2020-11-26 14:08:41 +0000 |
|---|---|---|
| committer | Rodrigo Vivi <[email protected]> | 2020-11-30 16:31:30 -0800 |
| commit | 777a7717d60ccdc9b84f35074f848d3f746fc3bf (patch) | |
| tree | 2e9a8c714aeb818b57b597336ff96f5c6f3fe76c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | b65054597872ce3aefbc6a666385eabdf9e288da (diff) | |
drm/i915/gt: Program mocs:63 for cache eviction on gen9
Ville noticed that the last mocs entry is used unconditionally by the HW
when it performs cache evictions, and noted that while the value is not
meant to be writable by the driver, we should program it to a reasonable
value nevertheless.
As it turns out, we can change the value of mocs:63 and the value we
were programming into it would cause hard hangs in conjunction with
atomic operations.
v2: Add details from bspec about how it is used by HW
Suggested-by: Ville Syrjälä <[email protected]>
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2707
Fixes: 3bbaba0ceaa2 ("drm/i915: Added Programming of the MOCS")
Signed-off-by: Chris Wilson <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Cc: Jason Ekstrand <[email protected]>
Cc: <[email protected]> # v4.3+
Reviewed-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
(cherry picked from commit 977933b5da7c16f39295c4c1d4259a58ece65dbe)
Signed-off-by: Rodrigo Vivi <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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