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| author | Jiancheng Xue <[email protected]> | 2016-04-23 15:40:30 +0800 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2016-05-06 11:13:32 -0700 |
| commit | 6c9da387c8d5c5254857d2782bd6c314226f4f27 (patch) | |
| tree | 3189ede959921db199f190d8aed8b8ab2fde692a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | f6ff57c8abde68c0bb8e0d4539f4204fc5ba45ae (diff) | |
clk: hisilicon: add CRG driver for hi3519 soc
The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions