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authorKulkarni, Ganapatrao <[email protected]>2018-12-06 11:51:31 +0000
committerWill Deacon <[email protected]>2018-12-06 13:03:17 +0000
commit69c32972d59388c041268e8206e8eb1acff29b9a (patch)
tree1d1e477db9250533e5f6cb26a9cb4c74097ff487 /tools/perf/scripts/python/export-to-postgresql.py
parentd6310a3f3396e004bdb7a76787a2a3bbc643d0b7 (diff)
drivers/perf: Add Cavium ThunderX2 SoC UNCORE PMU driver
This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory Controller(DMC) and Level 3 Cache(L3C). Each PMU supports up to 4 counters. All counters lack overflow interrupt and are sampled periodically. Reviewed-by: Suzuki K Poulose <[email protected]> Signed-off-by: Ganapatrao Kulkarni <[email protected]> [will: consistent enum cpuhp_state naming] Signed-off-by: Will Deacon <[email protected]>
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