diff options
| author | Palmer Dabbelt <[email protected]> | 2018-08-04 10:23:19 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2018-08-13 08:31:31 -0700 |
| commit | 62b0194368147def8c5a77ce604a125d620fc582 (patch) | |
| tree | ffb0a3da4944a8aa15ce481a5e695acc03da3684 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 6ea0f26a7913b2a72f9cbe84e77ad2cbeaaa9dde (diff) | |
clocksource: new RISC-V SBI timer driver
The RISC-V ISA defines a per-hart real-time clock and timer, which is
present on all systems. The clock is accessed via the 'rdtime'
pseudo-instruction (which reads a CSR), and the timer is set via an SBI
call.
Contains various improvements from Atish Patra <[email protected]>.
Signed-off-by: Dmitriy Cherkasov <[email protected]>
Signed-off-by: Palmer Dabbelt <[email protected]>
[hch: remove dead code, add SPDX tags, used riscv_of_processor_hart(),
minor cleanups, merged hotplug cpu support and other improvements
from Atish]
Signed-off-by: Christoph Hellwig <[email protected]>
Acked-by: Thomas Gleixner <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions