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author | Duy Nguyen <[email protected]> | 2024-01-25 16:34:30 +0100 |
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committer | Geert Uytterhoeven <[email protected]> | 2024-01-31 11:04:14 +0100 |
commit | 3bbdf8c3d32103e21d9a826e40340fa59fc579ea (patch) | |
tree | 40200a44505fe69668da30ab90aa740a8b07547d /tools/perf/scripts/python/export-to-postgresql.py | |
parent | 2a8998479328a6eb6a2b07a68c7a756fe717b9e2 (diff) |
dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
V4M (R8A779H0) SoC.
Signed-off-by: Duy Nguyen <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Niklas Söderlund <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions