diff options
| author | Xing Zheng <[email protected]> | 2016-06-30 10:18:59 +0800 |
|---|---|---|
| committer | Heiko Stuebner <[email protected]> | 2016-07-01 01:50:17 +0200 |
| commit | 3770821fa360525e6c726cd562a2438a0aa5d566 (patch) | |
| tree | ec494e523c723b6a1adbe00d46b2584c3321a897 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 6e3732a2bebc3f08a59d2eafc2aa613b92055e3f (diff) | |
clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bits
The CLKSEL_CON32 bit_0 is controlled for spdif_8ch, not spdif_rec_dptx,
it should be bit_8, let's fix it.
Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399")
Reported-by: Chris Zhong <[email protected]>
Tested-by: Chris Zhong <[email protected]>
Signed-off-by: Xing Zheng <[email protected]>
Cc: [email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions