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| author | Kishon Vijay Abraham I <[email protected]> | 2017-03-27 15:15:20 +0530 |
|---|---|---|
| committer | Bjorn Helgaas <[email protected]> | 2017-04-28 10:23:20 -0500 |
| commit | 2c949ce38f4e81d7487f165fa3b8f77d74a2a6c4 (patch) | |
| tree | bed29b8550b6e10eec99f726062ac7b94e1f669e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | f60b15b831b01973c71b54e82a258376f7593427 (diff) | |
ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP
The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should be
set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO in RC
mode. However in EP mode, the host system is not able to access the
MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it.
Acked-by: Tony Lindgren <[email protected]>
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions