drm/i915/glk: Remove 99% limitation.

While checking the opportunity to add a display_gen
check to allow glk and cnl to be on same bucket I noticed
these FIXME cases here.

So I got the confirmation from HW architect that we actually
never needed this workaround.

"GLK supports 2 pixel per clock, so pixel clock can be up to 2 * cdclk."

So, this reverts commit 97f55ca5b662 ("drm/i915/glk: limit pixel
 clock to 99% of cdclk workaround")

Fixes: 97f55ca5b662 ("drm/i915/glk: limit pixel clock to 99% of cdclk workaround")

Cc: Ville Syrjälä <[email protected]>
Cc: Madhav Chauhan <[email protected]>
Cc: Jani Nikula <[email protected]>
Cc: Clinton Taylor <[email protected]>
Cc: Arthur J Runyan <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
(cherry picked from commit 42882336e62aab00278114392a16374f272a0c99)
Signed-off-by: Joonas Lahtinen <[email protected]>

0 files changed, 0 insertions, 0 deletions