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authorMarek Szyprowski <[email protected]>2017-11-29 12:26:37 +0100
committerKrzysztof Kozlowski <[email protected]>2017-12-01 17:47:07 +0100
commit217d3f4f9ad5b4e51d8038560ce8906d19d1abe3 (patch)
tree80c47e7a354054c2f16f44d22bb6db499c630ae5 /tools/perf/scripts/python/export-to-postgresql.py
parentc4e7aba66bf08ed6af292f9d2e54a2806a015349 (diff)
arm64: dts: exynos: Add AUD power domain to Exynos5433 SoC
This patch adds support for AUD power domain to Exynos5433 SoCs, which contains following devices: a clock controller, a pin controller, LPASS module, I2S controller, ADMA PL330 engine and UART #3 device. Signed-off-by: Marek Szyprowski <[email protected]> Reviewed-by: Chanwoo Choi <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]>
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