spi: spi-fsl-dspi: Fix MCR register handling

The MCR register is not changed, so initialize it in dspi_init().

The exception is the CLR_TXF and CLR_RXF bits, which should be written to
before each transfer to make sure we start with empty FIFOs.  With MCR
register now configured as volatile, the regmap_update_bits will do a real
read-modify-write cycle.

Signed-off-by: Esben Haabendal <[email protected]>
Acked-by: Martin Hundebøll <[email protected]>
Signed-off-by: Mark Brown <[email protected]>

0 files changed, 0 insertions, 0 deletions