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authorMarek Szyprowski <[email protected]>2017-10-11 11:25:12 +0200
committerSylwester Nawrocki <[email protected]>2017-10-16 11:25:35 +0200
commit8ca8ac1024841781f544427b7ca5684e4c5637a9 (patch)
treeb0179807d145afd4333b5b041ede1b5680d9298c /tools/perf/scripts/python/call-graph-from-sql.py
parent75920aac275a930b4259b46e555d5b90f713e084 (diff)
clk: samsung: Add dt bindings for Exynos4412 ISP clock controller
Some registers for the Exynos 4412 ISP (Camera subsystem) clocks are located in the ISP power domain. Because those registers are also located in a different memory region than the main clock controller, support for them can be provided by a separate clock controller. Signed-off-by: Marek Szyprowski <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Sylwester Nawrocki <[email protected]>
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