diff options
| author | Boris Brezillon <[email protected]> | 2015-03-27 23:53:15 +0100 |
|---|---|---|
| committer | Boris Brezillon <[email protected]> | 2015-06-19 14:43:39 +0200 |
| commit | 6c7b03e1aef2e92176435f4fa562cc483422d20f (patch) | |
| tree | 5630b97e175b6b789e152e43591388b2346ed973 /tools/perf/scripts/python/call-graph-from-postgresql.py | |
| parent | 03bc10ab5b0f9b8f81bffbe6e40c944f9d3dbcc5 (diff) | |
clk: at91: pll: fix input range validity check
The PLL impose a certain input range to work correctly, but it appears that
this input range does not apply on the input clock (or parent clock) but
on the input clock after it has passed the PLL divisor.
Fix the implementation accordingly.
Cc: <[email protected]> # v3.14+
Signed-off-by: Boris Brezillon <[email protected]>
Reported-by: Jonas Andersson <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/call-graph-from-postgresql.py')
0 files changed, 0 insertions, 0 deletions