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authorSergei Shtylyov <[email protected]>2016-07-12 00:51:58 +0300
committerSimon Horman <[email protected]>2016-07-15 13:20:39 +0900
commit4b9b7b3a2c91e1ebf8be9c7efd4839b91d66e87e (patch)
treebf9472a2ceab27ae04308e0008bf5bc8391ed9ac /tools/perf/scripts/python/call-graph-from-postgresql.py
parent8fd763c75c3ab8e72e5d7f0d4c53531e6ff76197 (diff)
ARM: dts: r8a7792: add PLL1 divided by 2 clock
Despite the fact that QSPI clock has PLL1/VCOx1/4 clock as a parent, the latter hasn't been added to the R8A7792 device tree. This patch corrects that oversight. Signed-off-by: Sergei Shtylyov <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
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