diff options
| author | Lars Povlsen <[email protected]> | 2020-06-15 15:32:41 +0200 |
|---|---|---|
| committer | Arnd Bergmann <[email protected]> | 2020-07-28 11:13:48 +0200 |
| commit | e4e06a50b04296d17a4cf098a515fb452106ecf0 (patch) | |
| tree | f01c7437b53f639c36dd96aae49ef5b4783d6ba2 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py | |
| parent | 39c8378a1cdf856a3671b6431f99352b75a07248 (diff) | |
arm64: dts: sparx5: Add Sparx5 SoC DPLL clock
This adds a DPLL clock to the Sparx5 SoC. It is used to generate clock
to misc peripherals, specifically the SDHCI/eMMC controller.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Lars Povlsen <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py')
0 files changed, 0 insertions, 0 deletions