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authorAndrew Chew <[email protected]>2013-08-07 19:25:09 +0800
committerPeter De Schrijver <[email protected]>2013-11-26 18:43:58 +0200
commit897e1dde1ec1571a28545594633624927fa0a76e (patch)
treec7832c368645e80a3da98082cc13f8c2208a6028 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
parent252d0d2bb07119296e215de7dc9afa8d12746b80 (diff)
clk: tegra: Set the clk parent of host1x to pll_p
The power-on default parent for this clock is pll_m, which turns out to be wrong. Previously, bootloader reparented this clock. We'll do it in the kernel as well, so that there's one less thing that we depend on bootloader to initialize. Signed-off-by: Andrew Chew <[email protected]> Signed-off-by: Mark Zhang <[email protected]>
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