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| author | Pali Rohár <[email protected]> | 2022-01-04 16:35:28 +0100 |
|---|---|---|
| committer | Lorenzo Pieralisi <[email protected]> | 2022-02-03 10:54:06 +0000 |
| commit | c94ea32c0d3db6ce7ca4fe771051b5f8818b77f0 (patch) | |
| tree | b8a3589a093982e280b901b9f5f562a3d9fb2523 /scripts/gdb/linux/utils.py | |
| parent | d76a6ed0964af14327068408da095a2355a5b8dc (diff) | |
PCI: mvebu: Update comment for PCI_EXP_LNKCTL register on emulated bridge
Logic and code for clearing PCI_EXP_LNKCTL_CLKREQ_EN bit is correct, but
comment describing it is misleading. PCI_EXP_LNKCTL_CLKREQ_EN bit should be
hardwired to zero but mvebu hw allows to change it.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Pali Rohár <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions