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authorWill Deacon <[email protected]>2022-08-23 13:21:11 +0100
committerCatalin Marinas <[email protected]>2022-09-22 15:09:31 +0100
commitc44094eee32f32f175aadc0efcac449d99b1bbf7 (patch)
tree9f0b536a896a3b2d5e8c912c33024aeb3a50b06c /scripts/gdb/linux/utils.py
parente92072237e6c8497cad5e9d2f2e3c44bb9d26aef (diff)
arm64: dma: Drop cache invalidation from arch_dma_prep_coherent()
arch_dma_prep_coherent() is called when preparing a non-cacheable region for a consistent DMA buffer allocation. Since the buffer pages may previously have been written via a cacheable mapping and consequently allocated as dirty cachelines, the purpose of this function is to remove these dirty lines from the cache, writing them back so that the non-coherent device is able to see them. On arm64, this operation can be achieved with a clean to the point of coherency; a subsequent invalidation is not required and serves little purpose in the presence of a cacheable alias (e.g. the linear map), since clean lines can be speculatively fetched back into the cache after the invalidation operation has completed. Relax the cache maintenance in arch_dma_prep_coherent() so that only a clean, and not a clean-and-invalidate operation is performed. Cc: Mark Rutland <[email protected]> Cc: Robin Murphy <[email protected]> Cc: Christoph Hellwig <[email protected]> Cc: Ard Biesheuvel <[email protected]> Signed-off-by: Will Deacon <[email protected]> Reviewed-by: Catalin Marinas <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
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