drm/i915/mtl: Don't set PIPE_CONTROL_FLUSH_L3

This bit does not cause an explicit L3 flush. We already use
PIPE_CONTROL_DC_FLUSH_ENABLE for that purpose.

v2: Use FLUSH_L3 only pre-MTL since spec will likely remain
the same going forward.

Cc: Nirmoy Das <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Acked-by: Mika Kuoppala <[email protected]>
Reviewed-by: Nirmoy Das <[email protected]>
Signed-off-by: Vinay Belgaumkar <[email protected]>
Reviewed-by: Andi Shyti <[email protected]>
Signed-off-by: Andi Shyti <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

0 files changed, 0 insertions, 0 deletions