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authorLiu Yi L <[email protected]>2020-07-24 09:49:17 +0800
committerJoerg Roedel <[email protected]>2020-07-24 10:51:21 +0200
commit288d08e78008828416ffaa85ef274b4e29ef3dae (patch)
treed6d0c95bbc0c5a64549268ffb2494ce28e5d14ba /scripts/gcc-plugins/gcc-generate-simple_ipa-pass.h
parente7e69461a83264dbce2b4ff480f858f3f1454db7 (diff)
iommu/vt-d: Handle non-page aligned address
Address information for device TLB invalidation comes from userspace when device is directly assigned to a guest with vIOMMU support. VT-d requires page aligned address. This patch checks and enforce address to be page aligned, otherwise reserved bits can be set in the invalidation descriptor. Unrecoverable fault will be reported due to non-zero value in the reserved bits. Fixes: 61a06a16e36d8 ("iommu/vt-d: Support flushing more translation cache types") Signed-off-by: Liu Yi L <[email protected]> Signed-off-by: Jacob Pan <[email protected]> Signed-off-by: Lu Baolu <[email protected]> Reviewed-by: Eric Auger <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
Diffstat (limited to 'scripts/gcc-plugins/gcc-generate-simple_ipa-pass.h')
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