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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-02-14 20:05:40 +0900 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2017-02-15 11:32:14 +0100 |
commit | 4e03f628b464e0580abadf5161eaa38c61d20943 (patch) | |
tree | 6d929f2c69d9bd4f725c2bb3266e2400d1b8224e /net/ipv6 | |
parent | 006cac8262987981fb10a0360726875b48123b73 (diff) |
mmc: sdhci-cadence: fix bit shift of read data from PHY port
This macro is currently unused, but it may be useful for debug use.
Fix it just in case.
Fixes: ff6af28faff5 ("mmc: sdhci-cadence: add Cadence SD4HC support")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'net/ipv6')
0 files changed, 0 insertions, 0 deletions