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| author | Yang Guo <[email protected]> | 2022-09-27 11:32:21 +0800 |
|---|---|---|
| committer | Daniel Lezcano <[email protected]> | 2022-09-27 11:30:53 +0200 |
| commit | af246cc6d0ed11318223606128bb0b09866c4c08 (patch) | |
| tree | b12c8c4129ae8e062980a969a4114fad774ae0f9 /include/linux/compiler_attributes.h | |
| parent | 27b30995b75d1e79360c164ba179bca86ab76ba6 (diff) | |
clocksource/drivers/arm_arch_timer: Fix CNTPCT_LO and CNTVCT_LO value
CNTPCT_LO and CNTVCT_LO are defined by mistake in commit '8b82c4f883a7',
so fix them according to the Arm ARM DDI 0487I.a, Table I2-4
"CNTBaseN memory map" as follows:
Offset Register Type Description
0x000 CNTPCT[31:0] RO Physical Count register.
0x004 CNTPCT[63:32] RO
0x008 CNTVCT[31:0] RO Virtual Count register.
0x00C CNTVCT[63:32] RO
Fixes: 8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO timer programming over to CVAL")
Cc: [email protected]
Cc: Daniel Lezcano <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: Mark Rutland <[email protected]>
Acked-by: Marc Zyngier <[email protected]>
Signed-off-by: Yang Guo <[email protected]>
Signed-off-by: Shaokun Zhang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daniel Lezcano <[email protected]>
Diffstat (limited to 'include/linux/compiler_attributes.h')
0 files changed, 0 insertions, 0 deletions