diff options
| author | Shekhar Chauhan <shekhar.chauhan@intel.com> | 2023-10-30 20:37:56 +0530 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 11:43:31 -0500 |
| commit | 7eea3fb67a30a81c1751097753885657a1ace021 (patch) | |
| tree | bfef4bbfe6553c9329180a2e0517f0f9ba6bb45e /drivers | |
| parent | b8d70702def26d7597eded092fe43cc584c0d064 (diff) | |
drm/xe/xelpmp: Extend Wa_22016670082 to Xe_LPM+
Add Xe_LPM+ support to an existing workaround.
BSpec: 51762
Signed-off-by: Shekhar Chauhan <shekhar.chauhan@intel.com>
Link: https://lore.kernel.org/r/20231030150756.1011777-1-shekhar.chauhan@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_wa.c | 7 |
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index b00fe089525a..7a6407e38265 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -152,6 +152,7 @@ #define POLYGON_TRIFAN_LINELOOP_DISABLE REG_BIT(4) #define SQCNT1 XE_REG_MCR(0x8718) +#define XELPMP_SQCNT1 XE_REG(0x8718) #define ENFORCE_RAR REG_BIT(23) #define XEHP_SQCM XE_REG_MCR(0x8724) diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c index ce61609b001c..2f1782db267b 100644 --- a/drivers/gpu/drm/xe/xe_wa.c +++ b/drivers/gpu/drm/xe/xe_wa.c @@ -246,6 +246,13 @@ static const struct xe_rtp_entry_sr gt_was[] = { XE_RTP_ACTIONS(SET(SQCNT1, ENFORCE_RAR)) }, + /* Xe_LPM+ */ + + { XE_RTP_NAME("22016670082"), + XE_RTP_RULES(MEDIA_VERSION(1300)), + XE_RTP_ACTIONS(SET(XELPMP_SQCNT1, ENFORCE_RAR)) + }, + /* Xe2_LPG */ { XE_RTP_NAME("16020975621"), |