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| author | Zhao Yakui <yakui.zhao@intel.com> | 2019-04-25 17:04:54 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2019-04-29 14:26:59 +0800 |
| commit | 8631fef7f2037281efca685c9e717eaed33ee37c (patch) | |
| tree | 841017ba10ef73e68b5693010626b264c818e3a9 /drivers/uwb | |
| parent | 930c8dfea4b8f320bd7f6a3e5e721ac20e444e03 (diff) | |
drm/i915/gvt: Revert "drm/i915/gvt: Refine the snapshort range of I915 MCHBAR to optimize gvt-g boot time"
This reverts commit f74a6d9a2c427b6656bc93eacfa6d329ba54d611.
BXT needs to access 0x141000-0x1417ff register to obtain the dram info.
But after the snapshot range of I915_MCHBAR is refined in f74a6d9a2c,
it only initializes the range of 0x144000-0x147fff for VGPU and then
causes that the guest GPU can't get the initialized value for dram
detection on BXT.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/uwb')
0 files changed, 0 insertions, 0 deletions