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authorLu Baolu <[email protected]>2020-07-23 09:34:37 +0800
committerJoerg Roedel <[email protected]>2020-07-24 14:33:39 +0200
commitb1012ca8dc4f9b1a1fe8e2cb1590dd6d43ea3849 (patch)
tree22c29fd43a23c036aa3b73f9b298bd717d375c2d /drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
parent02f3effddfd04f3f08a24d23a82d1c1c6d89b777 (diff)
iommu/vt-d: Skip TE disabling on quirky gfx dedicated iommu
The VT-d spec requires (10.4.4 Global Command Register, TE field) that: Hardware implementations supporting DMA draining must drain any in-flight DMA read/write requests queued within the Root-Complex before completing the translation enable command and reflecting the status of the command through the TES field in the Global Status register. Unfortunately, some integrated graphic devices fail to do so after some kind of power state transition. As the result, the system might stuck in iommu_disable_translation(), waiting for the completion of TE transition. This provides a quirk list for those devices and skips TE disabling if the qurik hits. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=208363 Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=206571 Signed-off-by: Lu Baolu <[email protected]> Tested-by: Koba Ko <[email protected]> Tested-by: Jun Miao <[email protected]> Cc: Ashok Raj <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c')
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